PUBLISHER: ResearchInChina | PRODUCT CODE: 2136503
PUBLISHER: ResearchInChina | PRODUCT CODE: 2136503
Autonomous Driving Domain Controller (ADCU) Research: One-Chip CCU solutions are quickly available in vehicles
In China's passenger car market, autonomous driving systems involved in mass production have gradually shifted from L2 to L2.5/L2.9. Some L3 autonomous driving systems have gradually seen mass production and application through embedded hardware since 2026. In addition, OEMs are actively deploying L4 robotaxis. XPeng and Geely have successively launched robotaxis, and plan to cooperate with third parties in robotaxi operation in 2027-2028.
The mandatory national standard "Intelligent and Connected Vehicle - Safety Requirements for Automated Driving System" (GB 44721-2026) was released on July 30, 2026, and is scheduled to be officially implemented on July 1, 2027. 2026 marks the first year for large-scale commercial deployment of L3 autonomous driving systems, and high-level ADCUs will continue to see increase in volume.
"Starry" integrates the two major computing tasks of smart cockpit and autonomous driving through a single chip. Compared with the competitive "autonomous driving chip + cockpit chip" solution, the space can be saved by 50%, the components can be reduced by 30%, the software and hardware integration time is shortened by 56%, the R&D delivery cycle is compressed from 18 months to 8 months, and the cost per vehicle is reduced by RMB1,500 to 4,000. Horizon Robotics plans to start the production of "Starry" in October 2026, with mass production scheduled next year.
The first project adopting this chip has confirmed partnerships with PATEO CONNECT+, BICV, etc. to serve a leading new energy vehicle OEM in China.
With the popularization of the "central + zone" architecture, the penetration rate of One-Chip CCU solutions is rapidly increasing
Currently, Bosch, ThunderX, AutoLink World, and DeepRoute.ai have launched CCUs based on Qualcomm Snapdragon 8797, which are expected to be mass-produced and applied to vehicles from 2026 to 2028. ThunderX and BICV are conducting chip adaptation tests based on Horizon Robotics Starry. Black Sesame Wudang C1296 has been designated for Dongfeng's Tianyuan Intelligent Cockpit Plus Platform and will be the first mounted on Dongfeng eπ007. It is expected to be installed on all of Dongfeng's vehicle models in the future, and mass production is planned for multiple vehicle models from 2026 to 2027.
As the world's first vehicle model equipped with Qualcomm SA8797, Leapmotor D19 was officially launched in April 2026. Its CCU is equipped with two Qualcomm Snapdragon 8797 chips, with a comprehensive computing power of 1280TOPS (based on 4-bit sparse computing) and a memory bandwidth of up to 540GB/s. It is one of the cockpit-driving integration solutions with the strongest computing power in current production vehicles. After dual-chip collaboration is attained:
CPU: 2x18Oryon, 160SpecInt2k17rate, responsible for smooth system and multi-task operation;
GPU: 2x770FPSMan3.0, responsible for screen graphics rendering, AR display, and 3A image quality;
NPU: 640TOPS (single), 1280TOPS (dual), empowering AI foundation models and autonomous driving decision-making;
Memory: 48GB memory in the cockpit, 64GB memory in autonomous driving; LPDDR5x provides 540GB/s ultra-high bandwidth, ensuring that functions can run simultaneously without lag;
Safety: Built-in ASIL-D compliant hardware security island, highest automotive-grade functional safety level, underlying protection against runaway and faults.
Relying on dual 8797 chips + ultra-large memory, Leapmotor D19 is equipped with LEAP 4.0, pioneering cockpit-driving integration super synergy, breaking the barriers of traditional vehicle model cockpit and autonomous driving in-depth synergy, and enabling "a cerebrum to control the vehicle intelligence."
Dynamic allocation of computing power: The system will automatically allocate the computing power of the dual 8797 chips according to the car scenario. The entertainment scenario focuses on the cockpit GPU/CPU performance, and the NPU computing power is enhanced in autonomous driving to efficiently utilize the chip performance;
Two-way data interoperability: The cockpit and the autonomous driving system are deeply integrated, navigation information, autonomous driving pictures, and entertainment content are seamlessly rendered and switched without any sense, and the autonomous driving status is synchronized to the cluster and CID in real time;
Full-domain millisecond-level response: In-board transmission and no delay in the entire process from perception, decision-making to execution.
The AI computing power of a single Snapdragon 8797 chip is up to 640TOPS (based on 4-bit sparse computing). In the dual-chip architecture, one chip focuses on cockpit tasks such as voice interaction, ambient lighting, and HUD projection; the other handles autonomous driving tasks, including perception fusion, path decision-making, and vehicle monitoring. High-speed communication is realized via unified middleware, and each chip operates in a stable environment supported by Hypervisor.
For the cockpit, QAM8797P is paired with 48GB LPDDR5X and 128GB UFS; for autonomous driving, it is configured with 64GB LPDDR5X and 256GB UFS. QAM8797P has 10 PMICs, including 8XPMAU0102, 1XPMAU0101, and 1XTI TPS659472E on the back. There are four chips for deserialization. It is estimated that all of them are ADI MAX96724, but one of them may be MAX96714. The side view, front stereo and rear view cameras are involved with two MAX96724 deserializers, the surround view camera corresponds to one MAX96724 deserializer, and the DMS is supported by one MAX96714 or MAX96724 deserializer. D19 has 5 screens, namely CID, cluster screen, AR HUD, ceiling screen, and DLP projector. There are 4 serial chips, and the cluster screen and AR HUD may share one serial chip. The WiFI and Bluetooth modules are Quectel AF67E, and the Ethernet switch comes from from Realtek RTL9071CP. The MCU, namely Renesas U2A16, is on another PCB.
At the Leapmotor Tech Day in September 2026, Leapmotor officially released a new vehicle architecture - LEAP 5.0 . As a central domain control electronic architecture, LEAP 5.0 adopts a truly central integrated control mode. The central domain controller makes unified decisions, and the other domain controllers only execute tasks. The vehicle wiring harness is controlled within 500 meters. This architecture is iterated from LEAP 3.0 and LEAP 4.0. It is also the first centrally integrated EEA in the industry that simultaneously implements 48V power supply and 10 Gigabit Ethernet for the vehicle. The architecture has three core hardware and software capabilities:
The vehicle is powered by 48V. Compared with traditional 12V power supply, the wiring harness is 50% lighter and can support chassis-by-wire and high-power in-vehicle living functions;
The vehicle boasts asymmetric Ethernet, with 10G downlink, 100M uplink, a unified vehicle communication protocol, reducing gateway protocol conversion loss;
Powered by vehicle-cloud agent OS, the automotive agent ensures low-latency operation and data privacy. The cloud agent handles complex reasoning and long-term memory, and enables the vehicle to continuously learn and adapt to user habits through lightweight iteration.
ADCUs are upgraded and iterated, and some OEMs begin to develop high-computing-power autonomous driving chips by themselves
Li Auto currently has two versions of ADCUs: AD Pro and AD MAX:
AD Pro originally used Horizon Robotics J5 as its core, but has resorted to Horizon Robotics J6M.
AD MAX originally took NVIDIA Orin-X as the core, but has adopted NVIDIA Thor-U instead.
At the same time, Li Auto has replaced Nvidia Thor-U wit its self-developed Mach M100. Mach 100 includes the self-developed NPU, application CPU, multimedia IP, security modules and standard I/O interfaces, oriented towards high-level NOA and future L3/L4 capabilities. The effective computing power of a single Mach 100 chip reaches 1280TOPS, which is about 3 times that of Nvidia Thor-U, while the effective computing power of a dual-chip combination can be 5 to 6 times that of Nvidia Thor-U.
MACH M100 is ramping up rapidly. Li Auto disclosed that over 50,000 MACH M100 chips had been delivered as of August 2026. Currently, the second self-developed chip Mach 200 has entered the tape-out stage and is expected to be mass-produced in 2027. The computing power of a single chip exceeds 2000TOPS and the manufacturing process has upgraded to 3nm. Li Auto's chip roadmap is very clear: starting from the cockpit, extending to autonomous driving, and then to cockpit-driving integration.
Since the mass production of Turing chips in early 2024, XPeng has been planning to make a major revision to its central computing domain controller, or XCCP, so that all vehicle models of XPeng will be equipped with Turing chips, with four configurations (high, medium and low):
One Turing chip is paired with MediaTek MT8676 (Fibocom AN762S). The typical vehicle model with the configuration is MONA 03 MAX.
Two Turing chips are paired with MediaTek MT8676. MONA 03 Ultra SE has such a configuration.
There are three Turing chips, two of which are placed in the XCCP, and one is placed alone in the VLMU. Mid-range vehicle models such as G7 are also equipped with MediaTek MT8676, and high-end vehicle models like X9 and GX carry Qualcomm SA8295.
Four Turing chips are used for XPeng's robotaxi, and a separate one is added to serve as an autonomous driving redundant system. This move can increase the shipments of Turing chips as much as possible, dilute the chip R&D and NRE costs, and also simplify the hardware system design, multiplex the R&D results, and reduce R&D costs.
As the first supported vehicle model, Xpeng G7 Ultra is equipped with 3 Turing AI chips, with an effective computing power of 2200+TOPS and 216GB memory, boasting the industry's first L3 computing platform. Debut of local VLA+VLM: VLA-OL adds a "motion cerebrum" to autonomous driving for the first time, and the upper limit of autonomous driving capabilities is 10+ times higher than that of MAX vehicle models in the industry. VLM is an AI cerebrum for vehicles to understand the world, and the next-generation OS entry point for human-vehicle dialogue and control, which will become a standard feature of the next generation of AIDVs;
VLA-OL runs entirely locally, has stronger capabilities, does not require networking, and can be quickly deployed globally; it also has high frame rate, low latency, and long-sequence characteristics. Through 4D video stream perception fusion and 360° all-round perception, it improves environmental recognition capabilities in complex scenarios such as dark light, backlighting, rain and snow, etc., and helps autonomous driving respond to road conditions more accurately. In the future, this model will empower three major scenarios: ambulance recognition and giving way, reasonable lane changes in congested road sections, and pavement collapse avoidance.
According to information from XPeng's financial report conference call on March 20, 2026, the cumulative shipments of XPeng Turing chips had exceeded 200,000 units. It is expected to all vehicle models (including Max) will adopt Turing from the second quarter of 2026, and the annual shipments will be close to 1 million units. The large-scale production of the automotive business has reduced the manufacturing cost of a single Turing chip to RMB2,500-3,000.
In XPeng G7, XCCP looks like a box, but actually consists of two boxes (upper and lower) fixed together. There is a Turing chip on the board, equipped with 64GB storage. The LPDDR5 is speculated to be Micron D8CWL, and the UFS is Micron SH021, with a capacity of 256GB. XPeng G7's XCCP uses two MCUs (Infineon TC397); the cockpit uses Renesas U2A16, which is probably also responsible for gateways. The QSPI NorFlash equipped with U2A16 comes from Macronix. As a U2A16-specific ASIL-D PMIC, Renesas RAA271084 ensures that the system reaches ASIL-D.
Based on the MTK MT8676, Fibocom AN762S-CN is the next-generation multi-mode intelligent 5G Sub-6 communication module with built-in Android. AN762S-CN adopts a 60*60*5.0mm (TBD) SiP package to facilitate customers to flexibly develop terminals. It is compatible with 5G Sub-6, LTE, WCDMA, GSM and other network standards, and supports WiFi 6E, BT5.3 and multi-constellation GNSS. AN762S-CN has been certified by AEC-Q104. The CPU computing power is 170K DMIPS, the GPU computing power is 1.8TFLOPS, and the NPU computing power is 20TOPS.
For interconnection, the design leverages state-of-the-art 10G Ethernet to link multiple Turing chips. Broadcom BCM89890 (10G Ethernet PHY chip) is deployed. The Ethernet switch is Infineon 88Q6113, supporting two 10G ports. The 3-Turing and 4-Turing configurations may adopt Infineon MVQ6223, which features eight 10G ports and delivers a non-blocking switching capacity of 90G - the highest level in the automotive industry today.
In May 2026, BYD launched China's first 4nm autonomous driving chip - Xuanji A3. It has been mass-produced and supports L3 and L4 autonomous driving. The efficient collaboration of three chips can achieve a total computing power of over 2100TOPS, while taking into account power consumption control and computing power utilization.
BYD plans to launch DiPilot (L3/L4), which has ten layers of redundancy in the platform architecture. Besides, from sensor redundancy at the perception layer, to SoC and MCU redundancy at the computing layer, to algorithm and power supply redundancy at the control layer, as well as steering, braking, unlocking, communication, and parking redundancy at the execution layer, it realizes multiple backups for all aspects of the autonomous driving system. In addition, it is the first in the world to feature over-thousand-channel LiDAR, 1000fps global shutter cameras, dual long-wave IR cameras. The over-thousand-channel LiDAR has 4K image-level detection capabilities and an ultra-long detection range of 600 meters. The global shutter cameras have an ultra-high frame rate of 1000fps and an ultra-low latency of less than 1ms, ensuring the redundancy of L3 functions.
Summary 1: High-level ADCU & CCU and Chip Selection
Summary 2: Mid-level ADCU & CCU and Chip Selection (1)
Summary 2: Mid-level ADCU & CCU and Chip Selection (2)
Summary 3: Low-level ADCU & CCU and Chip Selection